A High-Speed Analog Turbo Decoder
نویسندگان
چکیده
A new type of iterative decoders based on analog computing networks, which are used to decode powerful error-correcting schemes, such as Turbo and Low-density parity-check (LDPC) codes, outperform their digital counterparts in terms of power consumption and speed. Only few analog Turbo decoders, all of them based on CMOS subthreshold technology have been implemented till now. This paper aims to present the design and enhanced functionality of an all-analog Turbo decoder taking advantage of high-speed features of SiGe HBTs achieving throughput up to Gbits/s. Simulation results based on AMS 0.35μm SiGe BiCMOS technology demonstrate promising performance compared to existing designs.
منابع مشابه
Analog Turbo Decoder Implemented in SiGe BiCMOS Technology
Error correcting decoder’s performance is crucial for communication systems. Since the performance of Turbo codes is close to the Shannon limit, ultra high-speed turbo decoder is desired. The aim of this design is to demonstrate the feasibility of implementing high-speed Turbo decoders in analog VLSI using SiGe BiCMOS technology. Detailed conceptual design is presented. Simulation results show ...
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